Computer SystemsInstructor: Hal Perkins
Textbook: Computer Organization and Design, Patterson and Hennssy
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1.: Course Introduction; PH Ch. 1 (background reading, skim/skip performance evaluation material), sec. 2slides annotated slides
2.: Memory and number representations, PH Sec 2.4, slides
3. MIPS instructions, PH Sec. 2.1-2.3, slides annotated slides example program: lecture03.s
4. SPIM, PH appendix B, slides, example programs: hello.s add.s addi.s addvals.s
5. Control flow; PH 2.6-2.7, B.9, B.10 through p. B-50, slides annotated slides
6. Procedures; PH 2.8, B.5, B.6 slides
7. Procedures
8. Procedures and programming examples annotated slides
9. Machine language; PH 2.5, 2.10 slides annotated slides
10. Machine language (concl.); Pipelining I, PH 4.1, 4.5 slides annotated slides
11. Pipelining (cont.)
12. Pipelining II; PH 4.6 pp. 356-357 only, 4.7, 4.8 (skim/skip hardware diagrams) slides annotated slides
13. Memory hierarchy & caches; PH 5.1-5.2 slides
14. Caches slides; PH 5.3
15. Caches (concl.) slides; Midterm review
16. May 5: OS overview; SG 1.1, 1.4-1.9, 2.1, 2.3-2.4, 2.6-2.7; rest of ch. 1 & 2 is good background reading. slides
17 OS overview, protection and context switching
18. Processes; SG ch. 3 through 3.3 slides
19. Processes (concl.); Threads; SG ch. 4 generally for background, 4.1-4.2 in detail slides
20. Threads
21. Scheduling; SG 5.1-5.5 (skim math for cultural enrichment) slides
22. Synchronization; SG 6.1, 6.2, 6.3 (skim), 6.4-6.5, 6.6 (skim), 6.7 slides
23. Synchronization; compare-and-swap
24. Deadlock; SG ch. 7 slides annotated slides
25. Memory management and virtual memory; PH 5.4, 5.5 slides annotated slides
26. Demand paging and page replacement; SG ch. 9 through 9.4.5 slides annotated slides
X. No class, Memorial Day holiday
27. Disks and file systems; PH 6.3, SG 10.1-10.3, 10.6, rest of ch. 10-12 has much useful information if you have the time. slides
28. File systems; SG ch. 7; Course wrapup
Computer Design And OrganisationInstructor : Jean Loup Baer
Textbook : Computer Architecture A Quantitative Approach by John L. Hennessy & David A. Patterson
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Topic
|
Files
|
Review
| |
Branch Prediction
| |
Exploiting ILP: Dynamic Scheduling
| |
Register Renaming and Multiple Issue
| |
VLIW
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Trace cache and back-end ops
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Caches
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Multiprocessors
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Cache Coherence
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Synchronization
| |
Multithreading
| |
Dataflow
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WaveScalar
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The final
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Brick and Mortar
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SlidesIntroduction to Computer Architecture
Text Books :
The spring 2009 textbook for COMP370 Introduction to Computer Architecture is
Fundamentals of Computer Organization and Design, by Sivarama P. Dandamudi, Springer publishing, 2003, ISBN: 038795211X
FSA example: at least three 1’s
FSA example: two or more consecutive zeroes
FSA example: two consecutive zeroes but not three Powers of 2
Computer Architecture and Organization
Lecture notes (in PDF formats)
Lecture notes (in PDF formats)
- Overview (pdf-2 or pdf-6)
- Performance Evaluation (pdf-2 or pdf-6)
- Instruction Set Architecture (pdf-2 or pdf-6)
- MIPS ISA: An Example (pdf-2 or pdf-6)
- ALU Design I: Basic (pdf-2 or pdf-6)
- ALU Design II: Multiplication (pdf-2 or pdf-6)
- ALU Design III: Divide and Floating Point (pdf-2 or pdf-6)
- Datapath Design: Single Cycle Implementation, Part I (pdf-2 or pdf-6 or pdf-notes)
- Control Design: Single Cycle Implementation, Part II (pdf-2 or pdf-6 or pdf-notes)
- Datapath Design: Multiple Cycle Implementation, Part I (pdf-2 or pdf-6 or pdf-notes)
- Control Design: Multiple Cycle Implementation, Part II ( Skipped )
- Pipelining, Part I (pdf-2 or pdf-6 or pdf-notes)
- Pipelining, Part II (pdf-2 or pdf-6)
- Memory Hierarchy: Overview (pdf-2 or pdf-6)
- Memory Hierarchy: Cache System (pdf-2 or pdf-6)
- Memory Hierarchy: Virtual Memory System (pdf-2 or pdf-6)
- Input/Output System: Bus (pdf-2 or pdf-6)
- Input/Output System: Role of Operating System (pdf-2 or pdf-6)
- Final Review (pdf)
The textbook for COMP375 Computer Architecture and Organization during the Fall 2008 semester is:
Computer Organization and Architecture: Designing for Performance, Seventh Edition,
by William Stallings, Pearson Prentice Hall, 2006, ISBN: 0131856448
by William Stallings, Pearson Prentice Hall, 2006, ISBN: 0131856448
Slides
Modern Computer Architecture
Lecture Notes and Slides
Computer Architecture
SyllabusSyllabus in Acrobat Format
Reading Assignments
Reading Assignments in Acrobat Format
Semester Project
Semester Project in Acrobat Format
Discussion 1 Historical Perspective on Tecnology
Discussion 2 Identifying Technology Trends
Discussion 3 Performance Metrics
Discussion 4 Canonical Computers
Discussion 5 Boolean Logic and Computation
Discussion 6 Combinational Logic/Simple Arithmetic
Discussion 7 Complex Arithmetic
Discussion 8 Sequential Logic
Discussion 9 More Sequential Logic
Discussion 10 Simple Execution Data Path
Discussion 11 Memory Technology
Discussion 12 Instruction Sets
Discussion 13 Instruction Fetch
Discussion 14 Combined Instruction and Execution Path
Discussion 15 Control Unit
Discussion 16 Pipelining
Discussion 17 Demo Day
Discussion 18 Branch Prediction
Discussion 19 Memory Hierarchy and Direct-Mapped Cache
Discussion 20 Associative Caches
Discussion 21 Virtual Memory
Notes from Prior Years
Computer Architecture
- Logistics and introduction. Quantifying computer performance. Slides: (powerpoint) (pdf)
- System Metrics. Slides: (powerpoint) (pdf)
- Pipelining basics. Slides: (powerpoint) (pdf)
- Advanced pipelining. Slides: (powerpoint) (pdf)
- Software ILP basics. Slides: (powerpoint) (pdf)
- Branch Handling. Slides: (powerpoint) (pdf)
- Branch prediction, Out-of-order processors. Detailed Notes on Out-of-order execution. Slides: (powerpoint) (pdf)
- More Dynamic ILP. Detailed Notes on Out-of-order execution Slides: (powerpoint) (pdf)
- Out of order implementations. Slides: (powerpoint) (pdf)
- Out of Order example. Slides: (powerpoint) (pdf)
- Caches. Slides: (powerpoint) (pdf)
- Large Caches. Slides: (powerpoint) (pdf)
- Large caches, VM and TLB. Slides: (powerpoint) (pdf)
- Main memory system basics. Slides: (powerpoint) (pdf)
- Main Memory System Trends. Slides: (powerpoint) (pdf)
- Virtual memory, Cache innovations. Slides: (powerpoint) (pdf)
- Cache innovations, Multiprocessor intro. Slides: (powerpoint) (pdf)
- Symmetric shared-memory architectures. Slides: (powerpoint) (pdf)
- Distributed shared-memory architectures Slides: (powerpoint) (pdf)
- Synchronization Slides: (powerpoint) (pdf)
- Consistency models. Slides: (powerpoint) (pdf)
- Advanced multi-core topics (Transactional Memory). Slides: (powerpoint) (pdf)
- Transactional Memory. Slides: (powerpoint) (pdf)
- Interconnection networks. Slides: (powerpoint) (pdf)
- Interconnection networks. Slides: (powerpoint) (pdf)
- Interconnection networks. Slides: (powerpoint) (pdf)
Computer Architecture: Parallelism and Locality
- Timothy G. Mattson, Beverly A. Sanders, Berna L. Massingill, “Patterns for parallel programming”, 2005, Addison-Wesley Boston.
- David B. Kirk and Wen-Mei Hwu, “Programming Massively Parallel Processors: A Hands-on Approach”, 2010, Morgan Kaufmann.
Download Slides :
| Lecture | Topic (notes) |
|---|---|
| 1 | Introduction |
| 2 | Locality in CPUs |
| 3 | Locality + Cache aware |
| 4 | Locality + Cache oblivious |
| 5 | Wires/Interconnect |
| 6 | Wires II |
| 7 | Wire Alternatives + HW Parallelism |
| 8 | HW Parallelism (I) (pptx/pdf) |
| 9 | HW Parallelism (II)(pptx/pdf) |
| 10 | SW Parallelism (I) (pptx/pdf) |
| 11 | SW Parallelism (II) (pptx/pdf) |
| 12 | SW Parallelism (III) (pptx/pdf) |
| 13 | SW Parallelism (IV) (pptx/pdf) |
| 14 | SW Parallelism (V) (pptx/pdf) |
| 15 | GPU and Graphics Intro |
| 16 | NVIDIA GPUs (I) (pptx/pdf) |
| 17 | NVIDIA GPUs (II) (pptx/pdf) |
| 18 | NVIDIA GPUs (III) (pptx/pdf) |
| 19 | NVIDIA GPUs (IV) (pptx/pdf) |
| 20 | NVIDIA GPUs (V) (pptx/pdf) |
| 21 | NVIDIA GPUs (VI) + CUDA (I) (pptx/pdf) |
| 22 | CUDA (pptx/pdf) |
| 23 | Memory Systems (pptx/pdf) |
| 24 | Quiz |
| 25 | Memory (II) + Heterogeneous (I) |
| 26 | Heterogeneous (II) |
| 27 | Conclusions (and reliability) |
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