Answers
51. Answer :
(a)
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Reason: Decoder.
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52. Answer : (b)
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Reason: A full-adder is simply a
connection of two half-adders joined by a OR gate, and other half-adder
simplify the AND gate also.
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53. Answer : (e)
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Reason: The corresponding between
the main memory blocks and those in the cache is specified by a mapping
function, because the basic characteristic of cache memory is fast access
time. Therefore, very little or no time must be wasted when searching for
words in the cache.
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54. Answer : (d)
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Reason: 16 RAM chips of size 256*4 are
needed to construct a CACHE of size 2KB
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55. Answer : (b)
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Reason: The collection of address spaces
in a physical memory is called address space.
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56. Answer : (a)
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Reason: The Bus master is allowed to
initiate data transfer on the bus.
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57. Answer : (a)
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Reason: Transfer of one word data at a
time using DMA transfer technique is called Cycle Stealing.
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58. Answer : (b)
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Reason: Serial interface transfers one
bit at a time, whereas others can handle more than one bit.
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59. Answer : (b)
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Reason: In a based Logical gates
are building blocks of combinational circuits whereas, flipflops are
combination of logic gates, registers are memory storages.
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60. Answer : (b)
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Reason: Entering new information into a
register is called loading.
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Reason : Divide the given number 888 by
5 and write all the remainder terms from the bottom to up and finally we will
get (12023) to the base 5
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Reason : C’ + A
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Reason : 3CD
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Reason : 8086 is a 16 bit processor.
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Reason : The data inside a computer is
represented in Binary form i.e (0’s and 1’s).
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Reason : A parity bit is used to detect
errors.
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Reason : The minimum number of bits
required to store a Hexadecimal number FF is 4.
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Reason : Makes some arithmetic
calculations faster.
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Reason : Motorola 8086 is not a
processor.
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Reason : Cycle Stealing concept is used
in DMA .
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71. Answer
: (a)
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Reason : optical storage has faster
access time than disk storage.
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Reason : It increases the disk storage
capacity and availability.
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Reason : It is used for accessing stack.
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Reason : Combinational circuits has
memory.
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Reason : Data Bus is not involved in
memory write operation.
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Reason : Arithmetic-logic unit is
responsible for coordinating various operations using timing signals
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Reason : pages out pages that have been
least used recently
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Reason : ROM is a non-volatile memory.
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Reason : Cache memory enhances memory
access time.
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Reason : When all of its inputs are low
and high.
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81. Answer : (c)
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Reason : A
machine cycle refers to Fetching, decoding and executing an
instruction.
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82. Answer
: (d)
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Reason : System
bus consists of a Control bus, Data bus and a Address bus.
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83. Answer
: (b)
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Reason : The
bootable code is stored in ROM.
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84. Answer
: (e)
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Reason : Access
time.
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85. Answer
: (d)
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Reason : System
bus is not a part of a cpu .
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86. Answer
: (e)
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Reason : Memory
mapped I/O involves transferring information between I/O devices and CPU .
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87. Answer
: (d)
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Reason : EEPROM
is the type of memory whose contents is erased with the passage of
electiricity.
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88. Answer
: (c)
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Reason : CPU
performance is measured in MHz
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89. Answer
: (c)
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Reason : The
read / write line belongs to the address bus.a
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90. Answer
: (a)
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Reason : Busy
waiting is to allow the CPU wait for a busy device.
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91. Answer :
(c)
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Reason: Addressing mode that specifies a register
which contains the memory address of the operand is Register Indirect
Addressing Mode.
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92. Answer :
(c)
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Reason: Address space indicate a set of Logical
Addresses.
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93. Answer :
(c)
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Reason: Stack does not Implement FIFO but implements
LIFO.
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94. Answer :
(e)
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Reason: Handshaking is the method in which the unit
receiving the data responds with another control signal.
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95. Answer :
(c)
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Reason: The page replacement algorithm in which
there is a replacement of a page, which will not be used for the longest
period of time is OPT.
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96. Answer :
(e)
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Reason: The input device for which finger shows the
cursor movement is Glide pad.
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97. Answer :
(b)
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Reason: 6543- 4444= 2099
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98. Answer :
(b)
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Reason: The octal equivalent of 011001 =31.
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99. Answer :
(b)
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Reason: SPA stands for Skip If (Accumulator)
Positive
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100. Answer :
(c)
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Reason: Combinational circuit is an interconnection
of logic gates.
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